Dear all,Would you please give me some suggestion? Now, I could accessing DDR of HPS and already create a NiosII to touch the same memory via Pipeline bridge and address extender. I could dump memory from NiosII side and HPS Linux side. My question is, If these two cores want to access the same memory, how should I do? Should I just Put the mutex core between them for protection? My experiment is as below, NiosII dump section1+2 memory and read/write data to section-1 of memory via DMA. Linux dump section1+2 and read/write data to section-2 of memory. If Linux only dump memory and not write data. the DMA of NiosII works well. If Linux write memory of section-2 , the DMA of NiosII could transmitted fine but data is not correct. Brian
I'd definitely put in a mutex, hardware lock, or something similar. The problem that you'll run in to is that you are using DMA on the NiosII, which will continue running, regardless. What are you trying to accomplish by having the Nios DMA write data at the same time as the HPS? You could always create two memory spaces, one as a sink for the DMA data, and one as a place for the HPS to write data to.You'd bsaically then have reserved memory for the Nios in the linker of the HPS to have some read-only space. Otherwise things really do get complicated, quick.