eclipse is not detecting any target connection and i downloaded .sof file in FPGA. i pressed several times refersh connections but it is not detecting. in my design niosii,clk with 24mhz,on chip mem,jtag uart and pio.iam using quartus ii 13.1 ver in windows 8,cyclone iii fpga and USB blaster ii. please help..
I consider that you already checked the connection cable to ignore the system ID by checking the check box of it. If not please do it. After that I recommend you to share with me a screenshot of the qsys design so I may find the issue.
thanks for ur reply .
yes i already checked above condition so many times. so i will share screen shots (qsys design,nios ii eclipse target connection detection problem,etc.) please give me solution.
I see no issue with the Qsys. I recommend you to change the JTAg configuration as follow:
- Open a Command prompt
-Type the following command
-Verify which cable number you are using
-Type the following command:
jtagconfig --setparam <cable number> JtagClock 16M
-Verify the change by typing the following command:
jtagconfig - -getparam <cable number> JtagClock
If it is not working, please reduce the JTAG clock, and let me know your feedback.
thanku for ur reply.
now target connection is detecting.but while loading .elf file it is showing an error that is downloading .elf process failed.
then i added system id(ID-0x00001234) ip and again generated and loaded into FPGA but nios eclipse showing that sys id and timestamp mismatch occured.
and also some warning are showing in nios eclipse platform like WARNING:FWD_pointer and please report.
so how can i solve this issue? Iam using quartus ii 13.1 web edition.
please help me.
Hi, please open the "Target connection tab" and check ignore system ID mismatch, then refresh connections.
attached is a screen shot showing the "Run configuration" window
Check the project folder if there is no .elf file that means there is an error stops the making of the .elf file, in this case please check the BSP settings and the memory size.
If there is an .elf file please check the JTAg speed configuration and try to reduce it via the following command :
jtagconfig --setparam 1 JtagClock 6M
please also watch the following video which is very useful:
Thanks for your confirmation. Can you please elaborate more about the next error? What breakpoints you add?
If you are OK to open another thread to keep each question in a separate thread this will be much helpful to the other users in future to search for each error and find the solution.
I really appreciate your help to validate Intel solutions.