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i am a beginner for FPGA and i work with linux-mmu on the de2 board.
https://www.alteraforum.com/forum/attachment.php?attachmentid=2777 when the system on de2 is power on,the sysinfo is https://www.alteraforum.com/forum/attachment.php?attachmentid=2778 when in ifconfig the eh0 the following info is present https://www.alteraforum.com/forum/attachment.php?attachmentid=2779 i have confused for 5 days ,what can i do thanksLink Copied
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I never used DM9000 but on nioswiki there is a good section about...
check http://www.nioswiki.com/index.php?title=operatingsystems/uclinux/ethernet&highlight=dm9000 Anyway, I would double check the sopc configuration (as indicated in nioswiki)... The driver seems loaded but, obviously, not working... Sorry :p Carlo- Mark as New
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thank you very much
i will check again- Mark as New
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Dear wang!
I met the same problem as you .Have you solved it successfully? I am relly puzzled now.- Mark as New
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--- Quote Start --- Dear wang! I met the same problem as you .Have you solved it successfully? I am relly puzzled now. --- Quote End --- :) i have fix it add those lines at the bottom of setup.c #if defined(CONFIG_DM9000) # include <linux/dm9000.h> static struct resource dm9k_resource[] = { [0] = { .start = DM9000A_BASE, .end = DM9000A_BASE + 3, .flags = IORESOURCE_MEM, }, [1] = { .start = DM9000A_BASE + 4, .end = DM9000A_BASE + 4 + 3, .flags = IORESOURCE_MEM, }, [2] = { .start = DM9000A_IRQ, .end = DM9000A_IRQ, .flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH, } }; static struct dm9000_plat_data dm9k_platdata = { .flags = DM9000_PLATF_16BITONLY, // default MAC addr .dev_addr = {01,01,01,01,01,01}, }; static struct platform_device dm9k_device = { .name = "dm9000", .id = 0, .num_resources = ARRAY_SIZE(dm9k_resource), .resource = dm9k_resource, .dev = { .platform_data = &dm9k_platdata, } }; static int __init dm9k_device_init(void) { /* customizes platform devices, or adds new ones */ platform_device_register(&dm9k_device); return 0; } arch_initcall(dm9k_device_init); # endif
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Nice of you to give reply .I have tried your method but unfortunately failed.Thank you all the same! maybe I met other problems.
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Ensure that your .v top file really connects the DM9000 signals from the SOPC core to the outer FPGA pins. Some Altera design examples lack this conection.
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