Anyone having a reference design or an idea on how to have a RTC as a NiosII peripheral ?The considered design shall use an EP1C3 + EPCS1SI8. Thanks! Cheers Franck P.
I'm not sure what the goal is here. The main feature of RTCs for other processors is that they run off a battery when power is removed, so they don't lose the time. You can't easily do that with an Altera (the whole chip would have to run off the battery, and they'll probably perform worse than dedicated chips when it comes to battery life).Two implementations come to mind: First, you could create a free-running timer with a 1 second period and then count seconds/minutes/hours/etc. in software. Or, you could build a 32.768 kHz external oscillator, hook it up to the Altera, divide it down (with a ripple counter, even), then feed the divided down signal to a 1-bit PIO device set to capture rising edges and interrupt. Then do the rest in software.