rebuilt u-boot does not recognize USB storage devices

[Altera_Forum]

Hi  

 I have an Altera SoCKit from Terasic. They provide a pre-built image that includes the SPL and u-boot.img (i.e. the contents of the "a2" partition). I can use it to access storage devices ("USB sticks") plugged into the USB2.0 port from the U-boot command line with the U-Boot usb command set.  The U-boot version command shows:U-Boot 2013.01.01 (Aug 08 2014 - 10:46:23) arm-altera-eabi-gcc.exe (Sourcery CodeBench Lite 2013.11-67) 4.8.1 GNU ld (Sourcery CodeBench Lite 2013.11-67) 2.23.52.2013091  However, this pre-built version lacks some U-Boot commands (specifically md5sum) so I needed to rebuild it to include those. I used Yocto "poky" (1.7.3) with the meta-altera/recipes-bsp/u-boot recipes, pulling from https://github.com/altera-opensource/u-boot-socfpga, branch socfpga_v2013.01.01, and building with bitbake virtual/bootloader commands.  I use the newly built u-boot.img to replace the one in the a2 partition with dd if=u-boot.img of=/dev/sdx3 bs=64k seek=4 (hence, leaving the SPL alone).  The new U-Boot image starts up fine and can boot a Linux kernel from the MMC card, however, I can no longer access a USB storage device from the U-Boot command line, instead getting this message (with a USB stick plugged in): USB0: Core Release: 2.93a dwc_otg_core_host_init: Unable to clear halt on channel 1 (timeout HCCHAR 0xC0000000 @ffb40520) dwc_otg_core_host_init: Unable to clear halt on channel 2 (timeout HCCHAR 0xC0000000 @ffb40540) dwc_otg_core_host_init: Unable to clear halt on channel 3 (timeout HCCHAR 0xC0000000 @ffb40560) dwc_otg_core_host_init: Unable to clear halt on channel 4 (timeout HCCHAR 0xC0000000 @ffb40580) dwc_otg_core_host_init: Unable to clear halt on channel 5 (timeout HCCHAR 0xC0000000 @ffb405a0) dwc_otg_core_host_init: Unable to clear halt on channel 6 (timeout HCCHAR 0xC0000000 @ffb405c0) dwc_otg_core_host_init: Unable to clear halt on channel 7 (timeout HCCHAR 0xC0000000 @ffb405e0) dwc_otg_core_host_init: Unable to clear halt on channel 8 (timeout HCCHAR 0xC0000000 @ffb40600) dwc_otg_core_host_init: Unable to clear halt on channel 9 (timeout HCCHAR 0xC0000000 @ffb40620) dwc_otg_core_host_init: Unable to clear halt on channel 10 (timeout HCCHAR 0xC0000000 @ffb40640) dwc_otg_core_host_init: Unable to clear halt on channel 11 (timeout HCCHAR 0xC0000000 @ffb40660) dwc_otg_core_host_init: Unable to clear halt on channel 12 (timeout HCCHAR 0xC0000000 @ffb40680) dwc_otg_core_host_init: Unable to clear halt on channel 13 (timeout HCCHAR 0xC0000000 @ffb406a0) dwc_otg_core_host_init: Unable to clear halt on channel 14 (timeout HCCHAR 0xC0000000 @ffb406c0) dwc_otg_core_host_init: Unable to clear halt on channel 15 (timeout HCCHAR 0xC0000000 @ffb406e0) scanning bus 0 for devices... 1 USB Device(s) found  scanning usb for storage devices... 0 Storage Device(s) found  scanning usb for ethernet devices... 0 Ethernet Device(s) found  Thinking that maybe the git repo was not up to date or too up to date, I also tried using the Quartus patches against the DENX release of 2013.01.01 from git://git.denx.de/u-boot.git, branch: u-boot-2013.01.y. All of the Quartus patches (there are 121 of them) applied cleanly, but the resulting u-boot.img built produced the same results as above.  I double checked the USB configuration options in socfpga_common.h & socfpga_cyclone5.h. They seem correct.  /* * USB */ #define CONFIG_SYS_USB_ADDRESS SOCFPGA_USB1_ADDRESS #define CONFIG_CMD_USB #define CONFIG_USB_DWC2_OTG #define CONFIG_USB_STORAGE #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX  (I also tried with/without CONFIG_USB_OHCI to no avail).  Can anybody shed some light on what I'm missing? I was hoping that I could replace the u-boot.img without involving the use of Quartus tools or rebuilding the SPL. Seems like I'm missing a patch that the pre-built image used but that is lacking from the git repo / Quartus patch set.    Thanks in advance for any advice!  --George Broz Moog Industrial Group

[Altera_Forum]

You can try to use latest U-Boot at http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=summary 

Wonder which USB stick that you are using? Can you try out to disable the dcache and check whether it works?

[Altera_Forum]

--- Quote Start ---  You can try to use latest U-Boot at http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=summary Wonder which USB stick that you are using? Can you try out to disable the dcache and check whether it works?  --- Quote End ---    Here's a question about u-boot. Have you tried using the newest U-Boot, clsee? I'm seeing that the last tag in the repository is from 16 months ago.

[Altera_Forum]

--- Quote Start ---  You can try to use latest U-Boot at http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=summary Wonder which USB stick that you are using? Can you try out to disable the dcache and check whether it works?  --- Quote End ---    I tried https://github.com/altera-opensource/u-boot-socfpga, branch: master, tag: v2015.10 which seemed promising as it included Terasic board support (by Marek Vasut). The resulting image did not work (hung just after SPL executed). I am still using the SPL from the pre-made 2013.01.01 build - not sure if that matters (e.g. do these need to be replaced as a set). There a few later versions in the git repo past v2015.10, but I would have expected this one to at least boot. I'm getting further from a solution...  When I restore my 2013.01.01 build I will try disabling dcache (via# define CONFIG_SYS_DCACHE_OFF in socfpga_cyclone5.h).  Thanks, --George  BTW - with the pre-built image, I can read the USB stick just fine. Here is the info on it since you were curious:  SOCFPGA_CYCLONE5# usb info 1: Mass Storage, USB Revision 2.0  - Kingston DataTraveler SE9 0014857749E5ECB0173000D3  - Class: (from Interface) Mass Storage  - PacketSize: 64 Configurations: 1  - Vendor: 0x0930 Product 0x6545 Version 1.0  Configuration: 1  - Interfaces: 1 Bus Powered 200mA  Interface: 0  - Alternate Setting 0, Endpoints: 2  - Class Mass Storage, Transp. SCSI, Bulk only  - Endpoint 1 In Bulk MaxPacket 512  - Endpoint 2 Out Bulk MaxPacket 512

[Altera_Forum]

Although the mix and match might work, it's not advisable as this combination is untested from time to time. 

I believe you can use the latest SPL which is the same as U-Boot. But note one thing is that the new SPL is expecting the U-Boot in raw partition (bs=512 seek=2560) instead of FAT filesystem. I am working on the patch to fix FAT enablement in SPL as the size too large to fix 64kB.  Coincidentally I managed to grab a Kingston pendrive. It works well with the 2013.01.01 version as below  U-Boot SPL 2013.01.01-00132-gd141e21 (Dec 28 2015 - 13:53:18) BOARD : Altera SOCFPGA Cyclone V Board CLOCK: EOSC1 clock 25000 KHz CLOCK: EOSC2 clock 0 KHz CLOCK: F2S_SDR_REF clock 0 KHz CLOCK: F2S_PER_REF clock 0 KHz CLOCK: MPU clock 925 MHz CLOCK: DDR clock 400 MHz CLOCK: UART clock 100000 KHz CLOCK: MMC clock 50000 KHz CLOCK: QSPI clock 370000 KHz RESET: COLD INFO : Watchdog enabled SDRAM: Initializing MMR registers SDRAM: Calibrating PHY SEQ.C: Preparing to start memory calibration SEQ.C: CALIBRATION PASSED SDRAM: 1024 MiB ALTERA DWMMC: 0 reading u-boot.img reading u-boot.img   U-Boot 2013.01.01-00132-gd141e21 (Dec 28 2015 - 13:53:18)  CPU : Altera SOCFPGA Platform BOARD : Altera SOCFPGA Cyclone V Board I2C: ready DRAM: 1 GiB MMC: ALTERA DWMMC: 0 *** Warning - bad CRC, using default environment  In: serial Out: serial Err: serial Net: mii0 Hit any key to stop autoboot: 0 SOCFPGA_CYCLONE5# usb reset (Re)start USB... USB0: Core Release: 2.93a scanning bus 0 for devices... 2 USB Device(s) found  scanning usb for storage devices... 1 Storage Device(s) found  scanning usb for ethernet devices... 0 Ethernet Device(s) found SOCFPGA_CYCLONE5# usb info 1: Hub, USB Revision 1.10  - DWC OTG RootHub  - Class: Hub  - PacketSize: 8 Configurations: 1  - Vendor: 0x0000 Product 0x0000 Version 0.0  Configuration: 1  - Interfaces: 1 Self Powered 0mA  Interface: 0  - Alternate Setting 0, Endpoints: 1  - Class Hub  - Endpoint 1 In Interrupt MaxPacket 8 Interval 255ms  2: Mass Storage, USB Revision 2.0  - Kingston DataTraveler 2.0 5B670D009F2D  - Class: (from Interface) Mass Storage  - PacketSize: 64 Configurations: 1  - Vendor: 0x13fe Product 0x1a00 Version 1.0  Configuration: 1  - Interfaces: 1 Bus Powered 200mA  Interface: 0  - Alternate Setting 0, Endpoints: 2  - Class Mass Storage, Transp. SCSI, Bulk only  - Endpoint 1 In Bulk MaxPacket 512  - Endpoint 2 Out Bulk MaxPacket 512  SOCFPGA_CYCLONE5#

[Altera_Forum]

BTW - Disabling dcache (via# define CONFIG_SYS_DCACHE_OFF in socfpga_cyclone5.h) had no effect on this issue. It still remains a problem.