some questions about nios

[Altera_Forum]

hi everyone, i am new to nois, i encouter some problems in my project: 

1. sysid and timesteap errors  when i start to run or debug in eclipse i meet the sysid and timesteap errors for several times. so i have to regenerate hdl in qsys, recompile design in quartus, rebuild project in eclipse, that wastes a lot time. how can i prevent this happen?  2.Error starting gdbserver i meet this error once in eclipse when i want to run or debug. how to fix it?  3. use pre-synthesis signals in signaltab analyer i find that the signaltap analyer(not plug-in ) is very usrful, especially when there is custom ip.using the signaltap II pre-synthesis to choose the signals i want to monitor is much easier than signaltap II post-fitting, but is the pre-synthesis mode reliable?i can find some signals in pre-synthesis mode that do not exist in post-fitting mode. how can the signaltap analyer guarantee the pre-synthesis signals i want to monitor is "real", will it cause misunderstanding during dubeg?  4. the quartus compile  i finish the debug and close eclipse, qsys and quartus, when i open the project again, there are no "green right" symble in the Tasks window, it seems like the project has not been compiled.do i have to re-complied the project? than cost a lot time in a big project .     5. how to copy project it is important to bak projects, so when i finish one stage and i want to move on , i want to copy the project to a new floder, then i bak the old project. in soc systems, there are some connections between quartus, qsys, eclipse,  how can i copy all of them to a new floder and make it still working?     6. reset the ip i see there are reset pins in each ip, is there a instruction in eclipse can let me reset the ip?      thanks!

[Altera_Forum]

Hi. 

[1] Don't click on Run as NIOS... but click on Run Configurations, this will re-read the values if present and you will not get this error in a high frequency again. [2] There are to few information given. [3] This is also the way I do, but if someone say it is wrong, please do... Sometimes HDL-Signal-Names are replaced due to reduction of logic inside the synthesis, so the wire exists, but with an other name, but ST will be placed correctly. [4] You can click on the Compilation report after re-opening the project. It is located (should be) the fifth symbol on the top, or is located at the menu <Processing> or via Shortcut Cntrl+R  I hope this helps

[Altera_Forum]

thanks! your advice are very helpful! 

 2.Error starting gdbserver this happens when i want to debug or run in nios II in eclipse, the only way i know to solve this is: regenerate hdl in qsys, recompile design in quartus, rebuild project in eclipse...

[Altera_Forum]

--- Quote Start ---  Hi. [1] Don't click on Run as NIOS... but click on Run Configurations, this will re-read the values if present and you will not get this error in a high frequency again. [2] There are to few information given. [3] This is also the way I do, but if someone say it is wrong, please do... Sometimes HDL-Signal-Names are replaced due to reduction of logic inside the synthesis, so the wire exists, but with an other name, but ST will be placed correctly. [4] You can click on the Compilation report after re-opening the project. It is located (should be) the fifth symbol on the top, or is located at the menu <Processing> or via Shortcut Cntrl+R  I hope this helps  --- Quote End ---    and i add 2 questions, can you give me more advise?  thanks a lot !!

[Altera_Forum]

[5] In my mind there should be a way to do so, but it is not generic for all of that stuff. But what is with e.g. SVN or some other version-control-system to backup a temporary state of a system?! 

[6] it depends how you connect the IP-resets with the rest of the system. If you have (just as short example) a PIO-Core which feeds just the reset of several IP-Cores, but not from the NIOS, then you could reset these Cores via accessing the PIO.  Kind regards

[Altera_Forum]

thanks for your help!