Nios® II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
12366 Discussions

uCLinux on Altera EP1S40 Eval Board

Altera_Forum
Honored Contributor I
729 Views

Hello, 

 

I recently started the evaluation of our new Altera EP1S40 eval board. Now I want to get the uCLinux running on this board. I installed the Microtronix uCLinux support for the NIOS2 IDE and I followed the Quick start guide to build my own kernel and the root file system. After that I flashed the two images to the board. Finally I downloaded the "linux_time_limited.sof FPGA design, that came from Microtronix togehter with the linux sources. Then I tried to connect me to the board via the nios2-terminal program. I got one line of output, but then I was not able to login (no input was possible). Could this be a problem with the FPGA design, which I downloaded to the board? 

 

Now I want to build my own NIOS2 SOPC FPGA design. Does the standard linux kernel from Microtronix need a special NIOS2 SOPC design or can I use the example design "niosll_stratix_1s40\full_featured", which is part of the NIOS2 software from Altera? 

 

Regards 

Swen
0 Kudos
0 Replies
Reply