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Altera_Forum
Honored Contributor I
708 Views

write master intermittent issues

I have an SOPC system and a write master. I use the write master to write in a 128 bit word into onchip memory every 1 second (the same address). Some of the time, it works fine but when I make a very small change (i.e., so the 128 bit word changes) the jtag uart output from nios stops outputting, so I just get a blank console screen where it should be periodically outputting the memory contents. It's strange because for some 128 bit words it works fine and for others, it doesn't and i'm having troublee identifiying the problem.

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3 Replies
Altera_Forum
Honored Contributor I
38 Views

You're doing IORD()?

Altera_Forum
Honored Contributor I
38 Views

 

--- Quote Start ---  

i'm having troublee identifiying the problem. 

--- Quote End ---  

 

 

1) Use SignalTap to probe the Avalon bus when you have the problem. 

 

2) Simulate the system using Modelsim and recreate the stimulus that is causing the hardware problem. 

 

3) Debug, and repeat from (1). 

 

Cheers, 

Dave
Altera_Forum
Honored Contributor I
38 Views

Ok, will try that. My code is  

while(1) 

printf("Data in MEM1\n"); 

for(j = 0; j < 4; j++){ 

printf("%X\n",IORD(ONCHIP_MEMORY2_0_BASE, j)); 

alt_busy_sleep(1000000); 

}
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