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Hello there!
Because of insufficient pins, i was forced to use a 16 bit SRAM memory. Now i want to run the program from this memory. i am using the cypress 32bit mem megafunction and have used a doubled clock for memory access. i asked altera for the documentations but i did not get any. has someone done this before and can help me with this? thanksLink Copied
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--- Quote Start --- originally posted by raghuraman@Oct 13 2005, 07:11 AM i am using the cypress 32bit mem megafunction and have used a doubled clock for memory access. --- Quote End --- I'm not sure what you mean by "doubled clock" (DDR-style data on both clock edges, or simply doubled clock frequency?). That said, you probably don't want the Cypress 32 bit memory component. You should create a custom component with no HDL files, make its slave an Altera Tristate Bus type, with memory addressing (instead of "native/register" addressing), and add whatever signals you need to hook up to the memory (CE=chipselect, WE=write, OE=read, A[...]=address, D[...][]=data). Then add it and an Altera Tristate Bridge to your design, hook it all up, and you should be good.
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no, i just used doubled clock frequency for the memory. i have no exp creating a custom component. i will try it now and let u know. thank u!
The NIOS IDE says that byteblaster II is not supported and may cause communications problems. Could this be the problem, because i see opcode fetches happening in the Disassembly window...
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