Altera TSE reference design 8.0

[Altera_Forum]

i am interested in viewing the packets generated in TSE reference design 

anyone knows how it is done  Is the data stored in onchip memory, if yes what is the start and end address of the  transmitted and received packet kindly help

[Altera_Forum]

There isn't any fixed address, the packet buffers are allocated at run time. You can run the application with a debugger to find them. 

OR if you just want to see the packets contents it should be easier to just connect a PC to the other end of the Ethernet link and use a packet sniffer such as Wireshark.

[Altera_Forum]

Can the data be read and stored in a file using Wireshark

[Altera_Forum]

yes, IIRC Wireshark can store data in a pcap format.

[Altera_Forum]

I tried connecting lan cat5e cable to rj45 jack of fpga and  

Optical fibre in loopback mode in SFP cages(on StratixII GX board ) I downloaded the Altera’s TSE design on fpga and run the program using laptop However wireshark is not showing any results