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Booting from EPCS to SDRAM with Q-II 5.1

Altera_Forum
Honored Contributor II
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We have a Cyclone-II FPGA (EP2C35F484C6) with a NIOS system and an EPCS64 Flash, where is the configuration of the FPGA and the programm code. We have the reset address pointing at this EPCS device, and an external SDRAM memory where the boot loader saves the programm to be executed. The problem we have is the FPGA is continually reconfiguring from the EPCS, we don't know exactly why, but we know is related to the SDRAM. If we force the system boots from the EPCS to an Onchip-RAM everything works perfectly!!. 

We think the problem may be also related to the Quartus-II 5.1 (it's the version we are using, with SP1 and SP2). 

 

Thanks!
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Altera_Forum
Honored Contributor II
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Hi jlistan, 

 

Does your application work (running in SDRAM) when you use nios2-download? 

If not, you should check your SDRAM configuration. 

 

Regards, 

--Scott
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Altera_Forum
Honored Contributor II
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Hello Scott, 

 

We know the SDRAM works OK, the problem occurs when the application is saved in SDRAM from the EPCS through the boot loader. 

 

Thanks.
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Altera_Forum
Honored Contributor II
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Do you solve the problem??? 

 

I have exactly the same!!! 

 

Everything works fine with JTAG (download from computer to SDRAM) but NIOSII don't boot when download the code from EPCS ( to SDRAM) 

 

Can you help me??? 

 

Thanks a lot!! 

 

 

 

 

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originally posted by jlistan@Jun 8 2006, 04:06 AM 

hello scott, 

 

we know the sdram works ok, the problem occurs when the application is saved in sdram from the epcs through the boot loader. 

 

thanks. 

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