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Building UBoot for NIOS II, PCIe Enumeration

Honored Contributor II

Hi All, 


Could anyone explain to me how to build a UBoot for NISO II? (I am a HW guy...) I was told that it would help me generate pcie enumeration 

code in which I am most interested in. :rolleyes: 



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Honored Contributor II

That's kind of a tough one to summarize.  


Is you PCIe system fixed, or are people going to be plugging in different PCIe devices/cards? As a HW guy, if you have a simple enough "known" system, it might be easier to just figure out how to enable the PCIe devices in your system. If I remember from your other post, I think you're just trying to use PCIe as a communications protocol between FPGAs (one with PCIe root complex, others set as endpoints). Is that correct? Any other PCIe devices in there except the FPGAs and the PLX switch? 


Enumeration is a pretty simple process if the topology is known, and I think all you need to know is how to turn on the switch and endpoints. Building UBoot might be overkill, although assuming UBoot does have the PCIe emumeration code in it, you might be able to reference some of the source code to write an algorithm to bring up the links. 


You might ask if anyone is familiar enough with the UBoot source to point you at the correct code section. Otherwise, I'd browse one of the PCIe reference books to see what's required.
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