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Can DMA transfer one 64-bit word per clock cycle?

Altera_Forum
Honored Contributor II
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I am using NiosII1.1, I want to know if the DMA can transfer one 64-bit word per clock cycle. 

Although in the DMA setting tab, 64-bit or even 128-bit word are selectable, I am not sure whether it transfer 64-bit one at a time or just read 32-bit word twice.
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Altera_Forum
Honored Contributor II
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yes , you can .  

 

but .. 

 

If you want to transfer one 64-bit word per clock cycle , both the data source and data destination must have 64-bit width
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