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I have an FPGA design with TSE and SGDMA created in Quartus 18.1.
When I generate BSP the SGDMA driver is added to the source tree but ins_tse_mac.h from eth_tse driver uses MSGDMA and the code does not compile (because MSGDMA driver itself was not added).
From IP reference I understand that MSGDMA is more advanced DMA version but we are trying to use SGDMA to keep compatibility with old design.
Is it still possible to use SGDMA in Quartus 18.1?
How can I generate BSP properly?
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Hi ,
It is not recommended to use the Deprecated IPs in the latest Quartus versions.
Please see the below link for the release notes. Would recommend to go with the mSGDMA IP.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/rn/rn_nios2.pdf
Thanks and Regards
Anil
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Hi Anil,
I am aware that mSGDMA supercedes SGDMA but, just in general, when a feature becomes deprecated it should not mean it is broken (or does not compile) in case someone else comes across the same issue I'd like to add that manually copying older TSE driver solves the compilation problem and allows using SGDMA in Quartus 18.1.
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Hi Jackhab,
Thanks for sharing the workaround with the community.
Thanks and Regards
Anil

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