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I followed the instructions per the Nios V Processor Tutorial document (AN 985) but I am not getting the simulation to work in Aldec Riviera-Pro on my Windows 10 computer.
I added all the necessary simulation libraries per the 'rivierapro_setup.tcl' script and compiled all the necessary files. However, I am getting this error message below:
Error: ELBREAD_0081 niosv_top_intel_niosv_m_0.v (142): Design unit niosv_timer_msip instantiated in intel_niosv_m_0.niosv_top_intel_niosv_m_0 not found in searched libraries: intel_niosv_m_0, work, hart, rst_controller, irq_mapper, mm_interconnect_0, onchip_memory2_0, jtag_uart_0, altera_ver, lpm_ver, sgate_ver, altera_mf_ver, altera_lnsim_ver, cycloneive_ver.
Am I supposed to compile the "niosv_timer_msip.sv" file as well?
Per the "rivierapro_setup.tcl' script, it doesn't look like I am supposed to, and it doesn't look like I can anyway since it is in an encrypted file.
Any suggestions?
Thanks.
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Hi Ryan,
Is it possible to share the project?
Regards
Tiwari
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Hi Ryan,
I am checking with the backend team on this issue.
Please do allow some more time on this. i will update you soon.
Regards
Tiwari
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Hi Ryan,
I am not getting any error while running NIOS V hello world example design.
I have used this example design-
Arria® 10 FPGA – Hello World on the Nios® V/m Processor Design Example (intel.com)
And run the simulation using the rivierapro_setup.tcl.
Regards
Tiwari
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Hi Ryan,
Please let me know if you have any query on this case.
If no then I will close this case today EOD.
Regards
Tiwari
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As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

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