Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
12690 Discussions

Externally Controlling Nios II Boot and cache init

Altera_Forum
Honored Contributor II
1,080 Views

I have been using an example from an458 (http://www.altera.com/literature/an/an458.pdf) to load code from one processor for a second processor and reset it. 

 

I recently ran into a problem with some strange software crashes and resets. 

 

I finally found that the instruction cache initialization code was missing from the beginning of my code in memory. It turns out that the make_flash_image_script.sh provided explicitly strips out the .entry section which contains the initi loop, with a strange comment: 

 

--- Quote Start ---  

We take our copy of the elf file, and we remove the ".entry" section. This section is where the reset code is typically linked, and since this application is really not responsible for handling reset activity, we'll remove it so we don't accidentally overwrite the intended reset code. 

--- Quote End ---  

 

 

Perhaps the idea was that if used with a bootloader that runs on the same processor, the boot loader would "handle reset activity" i.e. initialize the caches. This doesn't work when copying the code from a different processor. 

 

Then, even if I don't stip it, the copying code provided overwrites the first .entry instruction with a jump because the "entry point" it finds in the binary is still 0x20 (.text _start where the data cache initialization is) not 0x0 (.entry __reset where the instruction cache initialization is). I worked around this by only writing the jump instruction if there is no code at reset. 

 

Is anyone else using this example? How is it supposed to work reliably without initializing the instruction cache? 

How do I change the "entry point" at the end of the binary to .entry instead of .text/_start?
0 Kudos
0 Replies
Reply