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I thought this FIFOed Uart will be part of V6.1, as well as the avalon bridges ... lets see what V6.2 or V6.3 or V7.x will bring ...
So i installed the current V2 sources and our system just works as expected after a recompile. Great. But still the Input Clock Frequency is still wrong (it is the clock in and not the used clockfrom pll) Now i ask myself if this currently available version runs with BlueTooth Modules at 931kBit HW-Handshake as there has been reported some byte problems. Has anybody running this UART @ 931kBit with HW-Handshake and FIFO's ?? What settings should a apply too ? - Include CTS/RTS pins and control register bits (YES for HW handshake) - include transmit FIFOs ( n x 512 words M4K ) - include receive FIFOs ( n x 512 words M4K ) - Create hardware CTS inputs ??? Thanks in advance MichaelLink Copied
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