Nios® V/II Embedded Design Suite (EDS)
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Flash Programmer error

Altera_Forum
Honored Contributor II
‎03-28-2013 02:52 AM
1,806 Views

When I program my flash memory i get an error "Resetting and Pausing Target Processor : FAILED".Is there any need to change my design? 

 

https://www.alteraforum.com/forum/attachment.php?attachmentid=6976
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Altera_Forum
Honored Contributor II
‎03-28-2013 01:41 PM
1,076 Views

Hi, you are using Quartus < 10.0 and Nios II IDE, right ? 

Your are using an Altera kit, aren't you ? 

 

First, uncheck "ignore sysid" in flash programmer options. It is a bad idea to ignore sysid. 

 

Nios IDE have some troubles in programming flash. One solution is to restart Nios IDE. 

 

Maybe you try to program a flash via a wrong FPGA design (bad sysid). 

Maybe you have problem with reset signal. 

 

Good luck.
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Altera_Forum
Honored Contributor II
‎04-11-2013 05:19 AM
1,076 Views

Hi mmTsuchi, 

 

I have unchecked "ignore sysid". 

 

Please explain me the problem with the reset signal...i have attached the sopc design with this post...
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