Help with memory initialization

[Altera_Forum]

I am having a hard time getting my Nios code to work from bootup. I am using active parallel configuration and my FPGA code loads fine, but the Nios code doesn't load up. I have disabled the JTAG_UART and ran the mem_init_install in Nios 9.1 but still nothing. 

 The code works fine when I download it.  Attached is my memory initialization file. Is there something wrong here?  The documentation seems very short on this part of the process.

[Altera_Forum]

you can try using EPCS loader to load NIOS code on boot time. We also had some problems with loading NIOS code at boot. What we did is following: 

 Include EPCS controller in QSYS, change reset vector of NIOS 2 to point EPCS controller. Then, you can use some scripts like elf2flash, sof2flash to create .pof file for flash including both sof and elf files in it. And at boot -what I guess to be happing is- first sof is loaded then EPCS controller loads elf.   Now, you load only sof file, reset is pointing onchip memory, which does not have any meaninful data in it.

[Altera_Forum]

By the way, I am not sure if you can initialize sram with this method. But it should be OK with onchip mem. 

 There should be an easy method to include elf directly in sof file (so on chip mem is pre-loaded in sof file). I could find how to do it, but it should be so hard?? Similar to capturing image of running FPGA.