Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
12620 Discussions

How to organize data stream through AMBA bus between FPGA and HPS (with Linux)?

Altera_Forum
Honored Contributor II
1,503 Views

Hi everybody, 

I'm currently looking into how to transfer data between HPS and FPGA via AMBA AXI-interface. HPS is supposed to run Linux. Is it possible to do it using board support package provided by Altera (Golden System Reference Design, corresponding Linux device drivers, device-tree, etc.) or I need to write my own device driver to interact with AXI-interface?
0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
384 Views

Hi, 

 

First read Cyclone V SoC device handbook especially on HPS-FPGA bridges. 

Then examine a simpler Examples in the installed EDS_SOC (\embedded\examples). Use LW_HPS-FPGA bridge and GPIO Linux example. 

A more complex design is the VipDemo for Arrow SoCKit (run linux, and use bridges between FPGA-HPS portions). 

http://rocketboards.org/foswiki/projects/sockitvideoipvipreferencedesign 

 

There are full descriptions about functions under your installed EDS_SOC directory: 

SoCAL: as abstraction layer for SoC (similar to Nios's HAL) 

HWLib: Hardware Libraries 

Altera HWLib and SOCAL API pages: 

 

<altera_installation_directory>/embedded/ip/altera/hps/altera_hps/doc/hwmgr/html/index.html 

<altera_installation_directory>/embedded/ip/altera/hps/altera_hps/doc/socal/html/index.html 

 

I hope these helps to start your work. 

 

best regards 

 

ZS.V.
0 Kudos
Reply