I am working with Altera evaluation board for NIOS II/Cyclone and I have a question for you:
I noticed LAN92C111 component has two options. The default option is "MAC/PHY on Development Board". I am interested in the other one - MAC/PHY on Daughtercard. Do you maybe know what would be the wirring in that case? I cannot look it up on the Altera website nor in the forum archive...
Basically, I am looking for support of LAN chip using only 16 bit wide data bus in my design - I do not have as many pins in EP1C12 chip to drive Ethernet with full 32-bit bus together with flash, sdram, CF so switching to 16 bits would save me much here (18: 16 pins for data and 2 pins for byte-enable signals).
What would be the example wiring? Do I suspect correctly the second option for the component is what I need in my design? If not - can I modify the component script file to shorten the data bus and keep the compatibility with software drivers (uC/OS or Linux) ?
It looks like there is a "nios ethernet development kit", or it was and is obsolete now - do you have a User Guide/Schematic for this daughter card? I cannot find it on the altera website either...
http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/dry.gif
