Hi,I have got a 3C120 dev board from Altera and cannot make the TSE working. I'm using the latest sources of Linux (branch nios2) and have a very strange phenomena:
- if I patch the 'altera_tse.c' driver to _not_ discard the frame that the MAC detects as bad, everything works behind a 10 Mbps HUB (ping, telnet, ...), excepted that the ifInErrors counter increases for each frame received,
- behind a 10/100 Switch, packets are received with errors (like in 10Mbps), but sent packets don't reach the PC (i.e. they are filtered by the switch).
Do you know exactly which RX error is reported?Is the RX frame length correct (might be an extra/missing byte). Since IP works, and you aren't seeing massive errors in the telnet/ping data, it is likely that the errors are at the start/end of the frame. With an appropriate, directly connected, remote system you might be able to determine the actual error in the TX path. Try running ethereal/wireshark to see if any garbage is reported. It might even be a problem with the cable and/or connector.
Thanks for your answer.I haven't got a crossed cable right here so can't do a direct connection, but I will find one. My FAE told me that the constraints used for the design assert that the clock is centered around the data, which may need a special configuration of the PHY. Because I would avoid to modify the Linux kernel, I may have to change something in my clocks, but I don't know enough on hardware for that. My dev workstation is an old RHEL5 and I have only tcpdump. I will try also to find Wireshark that should give me more info on the errors...
You may not need a cross-over cable, many modern cards will do crossover automatically.Hmmm.... I've just looked at a linux system, can't see any way of distinguishing 'crc', 'non-octet aligned', 'framing', 'overlong' errors. You might get some info from using a direct loopback!
On Windows it depends on the network chipset, but it is sometimes possible to disable hardware error checking (from the driver advanced properties) and then the packets with crc. frame or other types of errors can be detected and displayed in Wireshark. It is probably also possible to do that on Linux by adjusting some kernel parameters.
As suggested by dsl, I have connected a PC directly to the eth port of the 3C120 dev board. Unfortunately, the PHYs negociated both 1000FD, and I haven't been able to modify this settings. 'mii-tool' on the PC side was changing its settings but the board LEDs were still indicating 1000/FD.Whatever the settings, Wireshark sees nothing coming from the dev_board. I have tried the Wiki design we can find here (http://www.alterawiki.com/uploads/f/f6/20110211_nios2_linux_3c120_125mhz_10.1sp1.tgz) with a very recent Linux kernel, then with my own design, then I have tried to set bit 1 & 7 of the Marvel 88E1111 register 20 to add a 2ns delay on the TX and RX clocks. I get always the same results : it doesn't work directly connected or behind a 100Mbps switch, and if connected behind a simple 10 HUB, Tx works nice and Rx are received with errors (according to the ifInErrors MAC counter), although Wireshark sees _no error_. I don't know what to do next : the only design/software which works on this board is the Simple Socket Server with nommu version of the Wiki design. I know that lots of guys are using ATSE with Linux, but I wonder if anyone as really succeeded with Linux on this board where only RGMII is possible...