Nios® V/II Embedded Design Suite (EDS)
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Memory Regions and Program sections

Honored Contributor II

Is there an example of a CS3 ROM type profile type link available in an example? 


Basically for my bare metal system, I'm trying to get CS3 to place the initialised data at the end of the text section and copy the data to the final location pre-main at the same time it performs the bss section zeroing in cs3_start_c. The reason for this is I want to setup the MMU using either 16MB super-sections and 1MB sections only to keep the TLB lookups to an absolute minimum, and hence the text and data areas are well separated in memory space. At the moment, the best I have managed with the correct alignment effectively pads the text section to the alignment of the data section and hence I get a huge multi-megabyte image and the data loading is effectively being done as part of the code load.
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