Nios® V/II Embedded Design Suite (EDS)
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NIOS II Project build for STARTIX V ALTERA board

Honored Contributor II

Hi all, 

I am using Altera stratix V Fpga. I have developed my .rbf file with the basic peripherals. and created .sopcinfo file for NIOS-II software development. When i entered the .sopcinfo its showing the cpu name as nios2_gen2_0, when I go for example Hello world, when I try for finish with BSP template. its giving me an error as .bsp canot be created. Please any one let me know whats the error for creating BSP flie. please find the attached error msg image. 


thanks in advance. 



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