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I was wondering if anyone could give me a couple of pointers on how to get NicheStack to interface to a non-standard TSE MAC architecture.
I've got a custom board with an external PHY controller and a C-IV device. I've developed a Qsys system which uses the Altera TSE MAC to interface to the PHY device; however I've used dedicated tightly coupled RAM blocks as the memory from which the SGDMA controllers read/write to. I know that this all works as I've implemented a custom IPv4 UDP (with ARP) protocol which allows me to send a receive UDP packets to a socket application on a PC. However I'd like to use NicheStack for the final application but I can't find much literature on how the stack interfaces with the MAC drivers (chapter 11 of the s/w developer's handbook has been particularly useless on this occasion....). Am I correct in assuming that the 'standard' NicheStack examples will not work with my design? If so I assume that I can simply modify the TSE drivers which the reference design requires? Or failing that is there any literature on the function calls which NicheStack requires so that I can write my own drivers? Thanks in advanceLink Copied
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I think you'll find some answers in this document: http://www.altera.com/literature/an/an440.pdf
There is a chapter called "Using Faster Packet Memory" starting on the bottom of page 9 that explains how to change the functions used by the NicheStack to allocate memory for the packet data. You don't need to change the driver itself, just some macros in ipport.h. Be careful though, as (at least in the old IDE) Eclipse sometimes re-generates ipport.h on top of your modified file, so keep a backup somewhere, just in case. The example project they talk about can be downloaded here: http://www.altera.com/support/examples/download/ethernet_accel_design.zip- Mark as New
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Brilliant! Thanks very much, that's exactly what I was looking for. I knew there would be an answer out there somewhere!

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