NiosV

[NGord]

Hi I am in the process of converting a MAX10 Nios2 design to a MAX10 NiosV. It boots from Flash loaded into DDR

All is good with the compiling apart from I need to convert the elf file to a hex file.
Nios2 was done with Eclipse tools and it created the script

alt-file-convert.exe -I elf32-littlenios2 -O hex --input=app.elf --output=mem_init/ext_flash.hex --base=0x44000000 --end=0x45ffffff --reset=0x44430000 --out-data-width=8 --boot="C:\intelfpga_lite\23.1std\nios2eds\components\altera_nios2\boot_loader_cfi.srec"

Now i have to use NiosV command line to do the same, but the alt-file-convert.exe command doesnt exist.

I think it may be something like this:

elf2flash --input=sw/app/build/app.elf --output=sw/app/build/mem_init/ext_flash.hex --epcs –-offset 0x0 --end=0x45ffffff --boot="C:/intelFPGA_lite/23.1std/niosv/components/bootloader/niosv_g_bootloader"

Note the --base and --reset that alt-file-convert.exe used can't be used with elf2flash - is that
correct?

[NGord]

I tried using Build and Debug load with Ashling IDE. following this video exactly.

https://www.youtube.com/watch?v=c6t-MVQ_j8Y

I got the terminal to display 'Hello World' a couple of times but then couldnt repeat it.

I had to make a C Project like the video.
If I tried to make a C++ project , it threw an error and wouldn't compile - another bug, It wanted to use MinGW Makefiles  even though the Cmake configuration called up UNIX Makefiles!
Thats another issue though.

It really does look like Nios V is flaky along with its build tools.

[JingyangTeh]

Hi

Taking a look at your BSP Settings. The address looks ok.

The linker is set to boot from 0x20000000 .

Instead of creating a project you could just add your project into the IDE and create a debug configuration.

https://www.intel.com/content/www/us/en/docs/programmable/730783/22-1std/importing-project.html

Once you imported you could create the debug connection.

Take note to select "Ashling RISC-V (auto-detect) Hardware Debugging"

Then in the debugger tab you could select the NiosV processor in the core selection.

https://www.intel.com/content/www/us/en/docs/programmable/730783/22-1std/setting-debug-configurations-and-downloading-59901.html

Please note to close the juart-terminal if you have open before opening a debugging connection.

If you are able to see the logs in the terminal from the project you created. That means the elf is working.

From the the debugger could you try taking a look at the address map of 0x20000000. To see if the bootloader have copied the code over to the memory space?

Regards

Jingyang, Teh

[NGord]

I havent found any way for Ashling IDE to give me a reliable error free build, even using 24.1.1 "import niosv cmake project"

The only method that work consistently error free  is by using niosv-shell with:-
 > cmake -S ./sw/app_hal -G "Unix Makefiles" -B sw/app_hal/build
> make -C sw/app_hal/build

Nios2 was never this troublesome.The same software and the same hardware worked just fine, but there I was using Quartus 18, not Quartus 23.1.1.

Maybe I will try Nios2 with Quartus 23.1.1 tomorrow to see what happens

If you can get a NiosV Hello working on a MAX10 development board on Windows 10 with WSL V1 , I would love to know.

[NGord]

Nios2 with the same design works ok on Quartus 23.1.1.

[NGord]

Finally I have something that almost works.

 Use Ashling IDE  24.1.1 "import niosv cmake project" and build project.
Downloading the elf file works either with Asling IDE 'Run as' or NiosV command shell niosv-download!

It doesnt run from External Flash though I do know 
elf2flash and
riscv32-unknown-elf-objcopy

both commands  work because I verified them with a nios2 elf 

I also get it working using internal flash for code storage and alt_load for writable sections.

So that just leaves  the "niosv_g_bootloader.srec"  which replaced Nios2  "boot_loader_cfi.srec".

Can we be certain "niosv_g_bootloader.srec" works with Generic QSPI??

[NGord]

Great! - I confirmed "niosv_g_bootloader.srec" works just fine when using UFM internal flash to store software.
It doesnt work when using Generic QSPI.
Interestingly I notice that Nios 2 had a number of bootloaders . I used the one for CFI flash.

NiosV only has one for each version.Its not clear whether any of them support QSPI.

This is my last problem. Give me an answer to this and I can close this issue!

[JingyangTeh]

Hi

The niosv_g_bootloader.srec should work for bootloader for booting from QSPI.

That is weird why it is not working on your QSPI Flash.

Could you try executing in place from QSPI just to see the access to QSPI is working?

Regards

Jingyang, Teh

[NGord]

You are right , it doesnt execute from QSPI flash. So the issue isnt so much the bootloader, but the NiosV isnt reading QSPI Flash at all.
Same software/hardware/ QSYS works with Nios2. Only difference is Nios2 swapped with NiosV.
My Flash is Micron MT25QL256 and I use the quartus.ini pgm_allow_mt25q=on.

I tried Niosv-m and Niosv-g. Neither seem to run from Flash.
I am using Generic QUAD SPI controller II Intel FPGA IP which worked with Nios2 . Should I be using Generic Serial Flash Interface Intel FPGA IP as stated in the Embedded Design Handbook? Shouldnt have to.

[NGord]

I inspected the QSPI signals on the board and all are moving. The clock is at the correct speed.

[JingyangTeh]

Hi

Just to check for executing in place for flash, did you disable the GSFI HAL Driver in the BSP?

4.5.1.1.2. Software Design Flow (intel.com)

Regards

Jingyang, Teh

[NGord]

No- first time I have seen that requirement!
Disabling GSFI is only when using alt_load to run code from Flash.
It has to be enabled for using bootloader running from RAM.
However - the point is the hexfile has to be Big endian for NiosV conversion to .pof file. Nios2 had to be  Little endian, that fixes it.

First time I ever saw that!!! Its a major difference. AN978 never mentions such a difference.
You can close this now. Thanks.

[JingyangTeh]

Hi

Sorry about that.

Have created a feedback to add this in the migration guide for NiosV.

They are mentioned here for driver disablement for GSFI when executing in place.

https://www.intel.com/content/www/us/en/docs/programmable/726952/24-2/software-design-flow-11011.html

For the endian needed it is mentioned here:

https://www.intel.com/content/www/us/en/docs/programmable/726952/24-2/programming-files-generation-04026.html

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Regards

Jingyang, Teh