Reset FIFO from NIOS

[Altera_Forum]

Hi!  

I have a sopc built system with a fifo, dma and the nios processor. With this I am transferring data from the fifo (that receives data from a custom made data generator) to sdram and further through ethernet. In software, I want to be able to run a system reset that resets the nios processor AND the fifo buffer. I have managed to reset the nios, but the fifo then contains "old" data after the reset. Is it possible in any way to empty the fifo buffer?   Thanks in advance for any answers! :-)

[Altera_Forum]

You could always read it until empty :-)

[Altera_Forum]

Try building you own component using altera fifo megafunction inside it and triggering the reset by a particular reset access.

[Altera_Forum]

Thank you guys! I'll give it a try.