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Hello every body;
I want to know how the nios deals with the avalon compatible custom component signals, or how it controls the read/write and clk/reset signals, this to adapt my custom component, There are any pdf please; ThanksLink Copied
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Nios II just issues memory reads or writes. It follows the master portion of the Avalon-MM specification so as long as the slave being accessed follows the Avalon-MM slave specification you don't have to worry about how the transactions progress through the interconnect. Since you are designing a custom component I recommend becoming familiar with the Avalon-MM specification as well as the Avalon-MM bus functional models (BFMs) so that you can validate your custom logic operates correctly within spec.
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