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core voltage analysis after dumping the logic into LABs

Honored Contributor II


I am trying to analyze the core voltage behavior in Cyclone-III FPGA. I want to check the core voltage behavior after dumping the logic into different LABs in Cyclone-III FPGA and using a different core voltage supply for each core voltage pin. If iam changing the LABs location the voltage of power supplies are changing but i am not be able to differentiate the core area that if i am putting the design in a specific area then it will take the power or current from a perticular supply.  

so if anybody is having a these type of results plz send it to me. 


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