- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi
i have de2-70 and quartus 2 10.1. and Nİos 2 10.1. i am trying to create embedded system using sopc builder. But When i compile with sopc builder it gives errors. i do all instructions on this video --> youtube "Design and Program a Computing Engine Using DE2-70 Altera FPGA Board" In this video, "Quartus II 9.1 SOPC builder" used. The difference is my quartus 2 and nios 2 version. For DE2-70 board which version of quartus must i use? Thanks for help...Link Copied
7 Replies
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
is this question hard?
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Yes. "it gives errors" is too vague as a description of your problem to give you an answer.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
the error is gived by sopc builder:::
# 2012.01.09 11:54:06 (*) Running Generator Program for cpu_0 # 2012.01.09 11:54:10 (*) Starting Nios II generation # 2012.01.09 11:54:10 (*) Checking for plaintext license. # 2012.01.09 11:54:15 (*) Plaintext license not found. # 2012.01.09 11:54:15 (*) No license required to generate encrypted Nios II/e. # 2012.01.09 11:54:15 (*) Getting CPU configuration settings ERROR: cpu_0/jtag_debug_module, never heard of alignment (dynamýc) before. Error: Generator program for module 'cpu_0' did NOT run successfully.- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Could you post a screenshot of your SOPC builder project?
Does SOPC builder actually say that? "never heard of alignment" is a really strange error message.- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I'm sorry, I have really no clue on this one, I've never seen that kind of cryptic error message before. How is the JTAG debug module connected to the CPU? IIRC both the instruction and data masters must be connected to it. Could you show another screenshot with all the connections?
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
well.
i think it is about licence. But altera says for this kind of design no licence required. i sappose to this is not true. So my friend has subcribe edition can generate succesfully. Thanks.![](/skins/images/7FC17B7B85029576C25F1E43CE255B51/responsive_peak/images/icon_anonymous_message.png)
Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page