fifo-dma, memset. good test or not?

[Altera_Forum]

My prototypesystem uses a dma to fetch data from a fifo to my SDRAM. 

 i want to test that the cpu has the time to play around with the data between each read from fifo without the fifo overflowing.  this is my testloop:  while(1){   alt_dma_rxchan_prepare(rxbuf,.....);  if(altera_avalon_fifo_read_level > testlimit){  printf("altera_avalon_fifo_read_level")  }  memset(rxbuf,...);  memset(rxbuf,...);  memset(rxbuf,...);  memset(rxbuf,...);  memset(rxbuf,...); }  my test runs nice, but can i conclude that the CPU and SDRAM are kept busy during the memset's? what i about is that the compiler might optimize away all memsets but the last.   Thanks

[Altera_Forum]

Im kind of sure my test is good now. As I add more memsets the maximum achieved fillevel increases.

[Altera_Forum]

Hi. I am trying to do DMA transfer from peripheral to memory. They suggest me to use FIFO with my peripheral, which my peripheral sends the data to FIFO, then from FIFO, DMA will transfer to SDRAM. Do you mind to assist me? I think your work is almost same as mine. Thanks! New user for altera stuffs. I hope you can help me asap because i need to get it done by this week! thanks a lot!

[Altera_Forum]

sure, I will be glad to help. take a look at this one. http://www.altera.com/support/examples/nios2/exm-avalon-mm.html.