Since the Board Description Editor is not working properly(reported in errata), I tried programming the FPGA config into my cfi_flash using the command line programmer from the sdk shell. This **appears** to work fine. It reads the cfi query table, erases fine, and says downloading from 0% to 90%, and then the Verify fails. I then do a manual dump of the cfi_flash memory, and sure enough the flash is programmed - but about 30% of the bytes are in error (by comparison to the .flash srec file).
This would make it sound like something's wrong with my flash device connections. Except I have done several tests and the flash device works fine. I performed several address/data bus tests - they all pass. I tried adding wait states to the cfi_flash in SOPC - same result.
I have no idea what else I can do to get my FPGA config into the cfi_flash. Any ideas???
