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sg-dma from altera wiki example design on nios

Altera_Forum
Honored Contributor II
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Hello  

 

I used the sg dma example design from  

http://www.alterawiki.com/wiki/file:sg-dma.zip 

 

I run that on arriaV 

 

the qsys connection are as the following 

ram -> tx sgdma -> fifo st -> rx sgdma -> ram 

 

the design is waiting for and "blocked here" 

while(tx_done == 0) {} 

 

 

Can you help how to debug ?  

 

Thanks!
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