I am trying to compile a simple CL kernel for my FPGA Cyclone V PCI-E Card.
No matter what I do, the compiler always returns an error after the synthesis is completed.
Error (11720): Run Analysis and Synthesis (quartus_map) with top-level entity name "top" before running Fitter (quartus_fit)
looking a the log I see that quartus_map command was issues to start the process, I don't understand what the problem is.
Thanks to all who can assist!
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