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CPUID instruction 1FH leaf

aozcan
New Contributor I
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Hi,

 

Documentation on CPUID keeps saying "checking existence of leaf 1FH and then using it over 0B H leaf if it is available". How can I check if leaf 1FH is available? If it is not available, is it possible to enable it somehow? If not, how can I access tile numbers of the cores using CPUID instruction.

 

Note: I am working on Skylake microarchitecture.

 

Thanks and regards

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n_scott_pearson
Super User Retired Employee
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I can answer the first question...

When you execute the CPUID instruction with EAX=0 and ECX=0, the returned EAX register value tells you the maximum input value - the highest leaf supported - that can be used in the EAX register in subsequent calls to the CPUID instruction.

  • If the value returned is exactly 0x1F, then you know that the (0x1F) V2 Extended Topology Enumeration Leaf is available.
  • If the value returned is lower that 0x1F, then you know that the (0x1F) V2 Extended Topology Enumeration Leaf is not available.
  • If the value returned is higher than 0x1F, then the (0x1F) V2 Extended Topology Enumeration Leaf might be available. In this case, to determine if it is actually available, invoke the CPUID instruction with EAX=0x1F and ECX=0. If the (0x1F) V2 Extended Topology Enumeration Leaf is not available, the returned values in registers EAX, EBX, ECX and EDX will all be 0x00.

If the (0x1F) V2 Extended Topology Enumeration Leaf is not available, then you will have to rely on only the information provided in the (0x0B) Extended Topology Enumeration Leaf; there is no way to force it into existence.

As for the second question, I am not absolutely sure. I think that the answer is that you can't access tile numbers. In cases where this is important, I believe that the (0x1F) V2 Extended Topology Enumeration Leaf should be available (touch wood).

Hope this helps,

...S

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