- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello all.
I'm newbie here.
I have an HP with a Core 2 Quad Q8400 processor, I have it since a few years. I'm using with Debian GNU/Linux and I think runs fine. Other day I was running some hardware detection programs in order to test it (the programs) and discovered caches L1 and L2 (it has not L3) are installed but disabled. I was searching in BIOS for some enable option without success.
How I could enable these caches in this processor?
Regards and thanks in advanced
Link Copied
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
It is hard to believe that L1 cash is disabled. Without it CPU would slow down to a crawl.
For a very long time I haven't seen BIOS option to http://www.tomshardware.co.uk/forum/150109-30-disabling-cache disable even L2 cache.
Could you paste screen shot or text output from that diagnostic tool? Even when I think that it is a mistake.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Of course, below you can find output fo dmidecode -t cache
# dmidecode 3.1
Getting SMBIOS data from sysfs.
SMBIOS 2.6 present.
Handle 0x0006, DMI type 7, 19 bytes
Cache Information
Socket Designation: L1 Cache
Configuration: Disabled, Not Socketed, Level 1
Operational Mode: Write Through
Location: Internal
Installed Size: 256 kB
Maximum Size: 256 kB
Supported SRAM Types:
Burst
Installed SRAM Type: Burst
Speed: Unknown
Error Correction Type: Parity
System Type: Data
Associativity: 8-way Set-associative
Handle 0x0007, DMI type 7, 19 bytes
Cache Information
Socket Designation: L2 Cache
Configuration: Disabled, Not Socketed, Level 2
Operational Mode: Write Back
Location: Internal
Installed Size: 4096 kB
Maximum Size: 4096 kB
Supported SRAM Types:
Burst
Installed SRAM Type: Burst
Speed: Unknown
Error Correction Type: Single-bit ECC
System Type: Unified
Associativity: 8-way Set-associative
Handle 0x0008, DMI type 7, 19 bytes
Cache Information
Socket Designation: none
Configuration: Disabled, Not Socketed, Level 3
Operational Mode: Unknown
Location: Unknown
Installed Size: 0 kB
Maximum Size: 0 kB
Supported SRAM Types:
Unknown
Installed SRAM Type: Unknown
Speed: Unknown
Error Correction Type: Unknown
System Type: Unknown
Associativity: Unknown
I'm pasting a portion from lshw -c memory command
*-cache:0 DISABLED
description: L1 cache
physical id: 6
slot: L1 Cache
size: 256KiB
capacity: 256KiB
capabilities: burst internal write-through data
configuration: level=1
*-cache:1 DISABLED
description: L2 cache
physical id: 7
slot: L2 Cache
size: 4MiB
capacity: 4MiB
capabilities: burst internal write-back unified
configuration: level=2
Thank you for your answer
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Both of those tools use the same source (DMI table inside BIOS). There might be wrong information.
You can https://www.linuxquestions.org/questions/linux-kernel-70/disabling-cpu-caches-936077/# post4651117 read what happens when you disable L1, L2 cache inside modern CPU.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
This is clearly a bug in the BIOS' SMBIOS support. I have never seen a production BIOS providing a way to disable these caches.
...S
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page