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Hi ,
We have a intel processor C3508 denverton ns series eval board. We are trying to develop coreboot image on it . It has 16 MB SPI boot flash .
Following are the things tried :
1. Downloaded 4.13 coreboot checkout . Built toolchain
2. Tried both changing native coreboot cache initialisation and FSP_T Initialsation .
3. Tried adding both micro_code generation from the tree and microcode_blob.h from the denverton package .
4. Added denverton fsp and including header files FSP*.h . (This step is not optional because , denverton series fsp's and header files are already checkedin in the coreboot code).
5. It generated coreboot.rom with the size 16MB . 67. Tried flashing coreboot.rom using dediprog tool . Programming is successful but no prints are coming .
6. Ram module is sodimm
In this some document it has mentioned to use spsFTIC tool to generate complete image .
We are not able to get any prints on this . Any help on this is highly appreciated .
Thanks,
GaneshC
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Hello venkatesabalaji,
Thank you for posting your question on this Intel® Community.
Intel Atom® Processor C3508 is an embedded processor. For this reason, our recommendation is that you post your question on the Embedded Community:
- Embedded Server > Intel® Xeon and Atom server Hardware, Firmware, Software and Tools
- https://community.intel.com/t5/Embedded-Server/bd-p/emb-server-hardware-software-firmware
In addition, if your company is directly supported by Field Application Engineers (FAEs), you can get in contact with them and use Intel® Premier Support (IPS) to submit issues.
To get an IPS account setup and activated, please contact your FAE.
We will proceed to close this thread. We hope you find this information helpful.
Regards,
Wanner G.
Intel Customer Support Technician
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