ICE-LAKE-Y Processor -Buffer Model or IBIS Model for LPDDR4 and PCIe GEN3

[KMANO3]

Hello Team,

For ICE-LAKE-Y Processor, we couldn't able to get Buffer models or IBIS Model for LPDDR4 and PCIe Gen 3. Kindly share us the file for the simulation.

[AndrewG_Intel]

Hello KMANO3,

Thank you for posting on the Intel® communities.

In order to have a better understanding of your request and look into the information you are looking for, could you please provide more details regarding your inquiry?

1- Are you deploying a hardware integration or customization on a specific system with Intel® Ice Lake Processors?

2- Are you developing, modifying or trying to improve software or applications?

3- Please provide more details or reference regarding the file and/or documents you are looking for:

Regards,

Andrew G.

Intel Customer Support Technician

A Contingent Worker at Intel

[KMANO3]

Hi Andrew G,

We are using Ice Lake Processors for one of the system and developing the same.

For SI/PI Simulations we have downloaded 573877 file, we couldn't able to find the following,

1. Buffer Models for PCIe Gen
2. Package and Buffer models for LPDDR4.

Requesting to share Models for the simulation.

[AndrewG_Intel]

Hello KMANO3,

Thank you for your response.

Regarding your inquiries about Buffer and Package models, file 573877 and for support options for system development, we would like to recommend you to refer to our Resource & Design Center. Please sign in or register and post your inquiries.

Regards,

Andrew G.

Intel Customer Support Technician

A Contingent Worker at Intel

[BSalo]

Hello, we are also looking for this information (as well as the re-timer IBIS and datasheet). We have logged into the the resource & Design Center but cannot see where to post our inquiry.

KMANO3, have you found what you are looking for?

We have also looked at 573877 (Ice Lake PCH-LP I/O Buffer Information Specification IBIS Models), but have not been able to find the models for the PCIe and LPDDR4.

Thanks