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INTEL N3350 SMBUS(Linux)

okuda
Beginner
835 Views

I would like to ask a question about SMBUS access of N3350. Is this forum okay?

0 Kudos
10 Replies
JosueO_Intel
Moderator
815 Views

Hello okuda, 


Thank you for posting on the Intel communities. 


We would like to know what information are you looking for about this processor. 


Let us know in order to be able to assist you in the best way possible. 


Regards,

 

Josue O.  

Intel Customer Support Technician



okuda
Beginner
765 Views

Hello Josue O. 

Thank you for your reply.
I would like to ask you the following questions.

1.On the motherboard on which the N3350 we are using is mounted, SMBUS Clk / Data with device ID 5ad4 exists as
  an external I / F.
  The temperature sensor / EEPROM is connected to the external I / F as a slave device.
  Is byte write possible for these two devices?

2.I am using Linux as the above OS, and I am using a driver that can be built with the driver source as attached.
  Byte read can be done without any problem using the attached source driver, but when byte write is executed,
  it becomes DEV_ERR.  
  The following is the execution result of the Linux command to access the SMBUS controller using the attached driver.
  Is there a mistake in the control method of the SMBUS controller? 
  Are there any restrictions when running byte write? 
  

1.i2cget -y 0 0x0a 0x00 <--- Linux command to read bytes from address 0x00 of slave address 0x0a with bus number 0
Debug message when executing(Bus number 0 is SMBUS)
[ 64.177372] i2cdev_open Start
[ 64.177389] i2cdev_open name i2c-dev 0
[ 64.177401] i2cdev_ioctl Start
[ 64.177406] i2cdev_ioctl Start
[ 64.177417] i2cdev_ioctl Start
[ 64.177421] i2cdev_ioctl_smbus Start
[ 64.177424] i2cdev_ioctl_smbus Call i2c_smbus_xfer 2
[ 64.177428] i2c_smbus_xfer Start
[ 64.177432] __i2c_smbus_xfer Start
[ 64.177435] i801_access Start
[ 64.177535] i801_access I2C_SMBUS_BYTE_DATA outp SMBHSTADD : 0xf044 value : 0x15<---1-bit left shift of slave address 0x0A + readwritebit:1
[ 64.177551] i801_access I2C_SMBUS_BYTE_DATA outp SMBHSTCMD : 0xf043 value : 0x00<---Access address
[ 64.177564] i801_access I2C_SMBUS_BYTE_DATA xact : 0x08
[ 64.177595] i801_transaction outp SMBHSTCNT : 0xf042 value : 0x48<---Byte Data:010 + Start
[ 64.178334] i801_wait_intr status : 0x00000042
[ 64.178351] i801_transaction i801_check_post 2 : 0x00000000 0x00000002
[ 64.178353] i801_access no block ret : 0x00000000
[ 64.178370] i801_access ret : 0x00000000
[ 64.178383] i2cdev_release Start

2.i2cset -y 0 0x0a 0x02 0x00 <--- Linux command to byte write 0x00 to address 0x02 of slave address 0x0a with bus number 0
Debug message when executing(Bus number 0 is SMBUS)
[ 398.069012] i2cdev_open Start
[ 398.069023] i2cdev_open name i2c-dev 0
[ 398.069031] i2cdev_ioctl Start
[ 398.069033] i2cdev_ioctl Start
[ 398.069039] i2cdev_ioctl Start
[ 398.069040] i2cdev_ioctl_smbus Start
[ 398.069042] i2cdev_ioctl_smbus Call i2c_smbus_xfer 2
[ 398.069043] i2c_smbus_xfer Start
[ 398.069045] __i2c_smbus_xfer Start
[ 398.069046] i801_access Start
[ 398.069122] i801_access I2C_SMBUS_BYTE_DATA outp SMBHSTADD : 0xf044 value : 0x14<---1-bit left shift of slave address 0x0A + readwritebit:0
[ 398.069132] i801_access I2C_SMBUS_BYTE_DATA outp SMBHSTCMD : 0xf043 value : 0x02<---Access address
[ 398.069140] i801_access I2C_SMBUS_BYTE_DATA(I2C_SMBUS_WRITE) outp SMBHSTDAT0 : 0xf045 value : 0x00<---Write Data
[ 398.069148] i801_access I2C_SMBUS_BYTE_DATA xact : 0x08
[ 398.069173] i801_transaction outp SMBHSTCNT : 0xf042 value : 0x48<---Byte Data:010 + Start
[ 398.069903] i801_wait_intr status : 0x00000044<---DEV_ERRbit:1
[ 398.069922] i801_check_post ENXIO
[ 398.069931] i801_transaction i801_check_post 2 : 0xfffffffa 0x00000004
[ 398.069933] i801_access no block ret : 0xfffffffa
[ 398.069949] i801_access ret : 0xfffffffa
[ 398.070040] i2cdev_release Start

Regards,

Koji Okuda.

okuda
Beginner
792 Views

Hello Josue O,

I sent a question in reply, but did it arrive?

Regards,

Koji Okuda.

JosueO_Intel
Moderator
768 Views

Hello okuda, 


We have not received any messages from you, please try posting again the question in order for us to assist you. 


Regards,

 

Josue O.  

Intel Customer Support Technician


okuda
Beginner
754 Views

Hello Josue O. 

Thank you for your reply.
I would like to ask you the following questions.

1.On the motherboard on which the N3350 we are using is mounted, SMBUS Clk / Data with device ID 5ad4 exists as
  an external I / F.
  The temperature sensor / EEPROM is connected to the external I / F as a slave device.
  Is byte write possible for these two devices?

2.I am using Linux as the above OS, and I am using a driver that can be built with the driver source as attached.
  Byte read can be done without any problem using the attached source driver, but when byte write is executed,
  it becomes DEV_ERR.  
  The following is the execution result of the Linux command to access the SMBUS controller using the attached driver.
  Is there a mistake in the control method of the SMBUS controller? 
  Are there any restrictions when running byte write? 
  

1.i2cget -y 0 0x0a 0x00 <--- Linux command to read bytes from address 0x00 of slave address 0x0a with bus number 0
Debug message when executing(Bus number 0 is SMBUS)
[ 64.177372] i2cdev_open Start
[ 64.177389] i2cdev_open name i2c-dev 0
[ 64.177401] i2cdev_ioctl Start
[ 64.177406] i2cdev_ioctl Start
[ 64.177417] i2cdev_ioctl Start
[ 64.177421] i2cdev_ioctl_smbus Start
[ 64.177424] i2cdev_ioctl_smbus Call i2c_smbus_xfer 2
[ 64.177428] i2c_smbus_xfer Start
[ 64.177432] __i2c_smbus_xfer Start
[ 64.177435] i801_access Start
[ 64.177535] i801_access I2C_SMBUS_BYTE_DATA outp SMBHSTADD : 0xf044 value : 0x15<---1-bit left shift of slave address 0x0A + readwritebit:1
[ 64.177551] i801_access I2C_SMBUS_BYTE_DATA outp SMBHSTCMD : 0xf043 value : 0x00<---Access address
[ 64.177564] i801_access I2C_SMBUS_BYTE_DATA xact : 0x08
[ 64.177595] i801_transaction outp SMBHSTCNT : 0xf042 value : 0x48<---Byte Data:010 + Start
[ 64.178334] i801_wait_intr status : 0x00000042
[ 64.178351] i801_transaction i801_check_post 2 : 0x00000000 0x00000002
[ 64.178353] i801_access no block ret : 0x00000000
[ 64.178370] i801_access ret : 0x00000000
[ 64.178383] i2cdev_release Start

2.i2cset -y 0 0x0a 0x02 0x00 <--- Linux command to byte write 0x00 to address 0x02 of slave address 0x0a with bus number 0
Debug message when executing(Bus number 0 is SMBUS)
[ 398.069012] i2cdev_open Start
[ 398.069023] i2cdev_open name i2c-dev 0
[ 398.069031] i2cdev_ioctl Start
[ 398.069033] i2cdev_ioctl Start
[ 398.069039] i2cdev_ioctl Start
[ 398.069040] i2cdev_ioctl_smbus Start
[ 398.069042] i2cdev_ioctl_smbus Call i2c_smbus_xfer 2
[ 398.069043] i2c_smbus_xfer Start
[ 398.069045] __i2c_smbus_xfer Start
[ 398.069046] i801_access Start
[ 398.069122] i801_access I2C_SMBUS_BYTE_DATA outp SMBHSTADD : 0xf044 value : 0x14<---1-bit left shift of slave address 0x0A + readwritebit:0
[ 398.069132] i801_access I2C_SMBUS_BYTE_DATA outp SMBHSTCMD : 0xf043 value : 0x02<---Access address
[ 398.069140] i801_access I2C_SMBUS_BYTE_DATA(I2C_SMBUS_WRITE) outp SMBHSTDAT0 : 0xf045 value : 0x00<---Write Data
[ 398.069148] i801_access I2C_SMBUS_BYTE_DATA xact : 0x08
[ 398.069173] i801_transaction outp SMBHSTCNT : 0xf042 value : 0x48<---Byte Data:010 + Start
[ 398.069903] i801_wait_intr status : 0x00000044<---DEV_ERRbit:1
[ 398.069922] i801_check_post ENXIO
[ 398.069931] i801_transaction i801_check_post 2 : 0xfffffffa 0x00000004
[ 398.069933] i801_access no block ret : 0xfffffffa
[ 398.069949] i801_access ret : 0xfffffffa
[ 398.070040] i2cdev_release Start

Regards,

Koji Okuda

okuda
Beginner
752 Views

Hello Josue O. 

 

The page I'm looking at has two types of replies.

1.Reply to your message
  When I use this reply, I also cannot see the reply from the forum page.
  I can refer to it from the link address in the message sent to my email.
  The first question I sent to you used this reply.

2.Reply to topic
  We can use this reply to browse the message from the forum page.
  The second question (the same question as the first) used this reply.

Which reply should I use to interact with you?
(This reply uses a reply to the topic.)

Regards,

Koji Okuda

okuda
Beginner
732 Views

Hello Josue O. 

 

The first question wasn't visible in the forum at first, but it's now visible.
I don't know why

Regards,

Koji Okuda

okuda
Beginner
720 Views

Hello Josue O. 

The attached screenshot image is a message image of the forum on the Japanese page.
The English page only has a green framed reply.
If you switch to Japanese, the reply in the red frame will be displayed.

Regards,

Koji Okuda

JosueO_Intel
Moderator
702 Views

Hello okuda, 


Thank you for the information provided, I will check your inquiries internally and post back soon with more details. 


Regarding the reply, both options should work and they both will post in the thread. 


Regards,

 

Josue O.  

Intel Customer Support Technician



JosueO_Intel
Moderator
687 Views

Hello okuda, 


In this case, because the SMBUS is related to the chipset, you need to contact the system manufacturer to know if the setup is supported in the system. This is because OEMs may have customized chipset settings that can change how the system work and its supported features. 


Hope this information is useful, if you need any additional information, please submit a new question as this thread will no longer be monitored. 


Regards,

 

Josue O.  

Intel Customer Support Technician



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