Hi,
from "Intel® 64 and IA-32 Architectures Software Developer’s Manual", we know that in the latest CPU, TSC(timestamp counter) is constant and invariant. It means that TSC in each core will tick at a constant rate. If each core receives the RESET signal at the same time, then TSC is synchronized.
However, it is not clear from the manual whether each core is able to receive the RESET signal at the same time, especially in a multi-socket (like 4, or even environment.
From the description of "Section 17.17.3 Time-Stamp Counter Adjustment" in the manual, it seems to guarantee that TSC is synchronized across sockets as long as TSC_ADJUST is the same across each core.
However, I also find research papers [1] mentioning that TSC is not guaranteed to be synchronized because "processors do not receive the RESET signal at the same time" (from Introduction of [1]).
So, is TSC guaranteed to be synchronized? How do TSC synchronize across sockets? Can TSC reflect real time (like, building transactions on TSC) ?
[1] A Scalable Ordering Primitive for Multicore Machines Sanidhya. Eurosys'18.
