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In the following pseudo code description of the intel loop instruction, when the operand size is 16, this description appears to omit use of the DEST branch-target operand in the taken case:
IF BranchCond = 1 THEN IF OperandSize = 32 THEN EIP ← EIP + SignExtend(DEST); ELSE IF OperandSize = 64 THEN RIP ← RIP + SignExtend(DEST); FI; ELSE IF OperandSize = 16 ?---> THEN EIP ← EIP AND 0000FFFFH; FI; FI; IF OperandSize = (32 or 64) THEN IF (R/E)IP < CS.Base or (R/E)IP > CS.Limit #GP; FI; FI; FI; ELSE Terminate loop and continue program execution at (R/E)IP; FI;
By the arrow I added (?--->), it appears to me that DEST goes unused, in the case of 16-bit OperandSize — it is protecting against wrap but adding nothing in.
The write up from intel:
https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf
page "Vol. 2A 3-543".
FelixCloutier has the same code as intel:
https://www.felixcloutier.com/x86/loop:loopcc
If this is a typo/bug in the intel spec where to report it?
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Thank you for the information provided.
I will proceed to check the issue internally and post back soon with more details.
Best regards,
Jean O.
Intel Customer Support Technician
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Hello @HaniMalik
Thanks for the report. We have taken a look at the information you provided, and have taken action on it, so the typo has been corrected, and the new document version is now uploaded.
Since the thread is now solved, we will close it. If you need additional information, please submit a new question, as this thread will no longer be monitored.
Thanks for your understanding, and once again, I appreciate the heads up.
Best Regards,
Jean O.
Intel Customer Support Technician

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