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Thank you for your support.
In the High-Speed I/O (HSIO) of Xeon D-1700, I have implemented NVMe on the PCIex1 port assigned to PCH PCIe Cluster 0 Root Port 0.
When I performed a reset on NVMe, I encountered a Master Abort on the LAN controller implemented on the PCIex4 port assigned to PCH PCIe Cluster 1 Root Port 4 for some reason.
Has anyone experienced such an issue before?
Also, if there are any possible factors to consider, please let me know.
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