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Hi Intel,
We are planning to perform PCIe loopback in XEON-D-2187NT Processor PCIe port.
All we need is PCIe control register details for external/internal Loopback enable /disable.
We want to know the default status of the specific registers and after modification what will be the value we have to expect on the registers.
And also need to your quick support to perform External loopback test in PCIe ports.
Thanks and Regards,
Subramaniam
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Hello Subramaniam,
Thank you for posting your question on this Intel Community.
Based on the information you have provided, our recommendation is that you post your inquiries on our Embedded Community.
Embedded Developers
https://community.intel.com/t5/Embedded-Developers/ct-p/embedded-developers
If your company is directly supported by Field Application Engineers (FAEs), you can get in contact with them and use Intel® Premier Support (IPS) to submit issues. To get an IPS account setup and activated, please contact your FAE.
For additional resources, we recommend that you visit the Resource & Design Center.
Resource & Design Center
https://www.intel.com/content/www/us/en/design/resource-design-center.html
We hope you find this information helpful. We will proceed to close this thread.
Wanner G.
Intel Customer Support Technician
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