SIMD register inside a core

[cake]

Hi All,

I’m a student studying SIMD performance. While studying, I came across the following problems:

- how many SIMD registerss are there inside a core of a CPU? 

- we know that the registers are duplicated due to SMT Hyperthreading, are the SIMD registers also duplicated?

We can take Intel AVX-512 as an example. There are AVX-512 registers ZMM0–ZMM15, so making up 16 SIMD registers in a core. It seems the 2 HTs are sharing these 16 SIMD registers. Is this true?

Thanks!!

[Alberto_Sykes]

cake, Thank you for posting in the Intel® Communities Support.

In reference to this case, the information requested might vary depending on the type of Intel® processor being used, is there any specific model of processor that you are interested in?

Please provide the specific model of the Intel® Processor so we can further assist you.

In the following link you will find additional information about SIMD that might be helpful for you:

https://www.intel.com/content/www/us/en/support/articles/000005779/processors.html

Any questions, please let me know.

Regards,

Albert R.

Intel Customer Support Technician

[cake]

Hi Albert, 

Let's specify with intel i9-10900k.

- how many SIMD registers are there inside a core of this CPU? 

- we know that the registers are duplicated due to SMT Hyperthreading, are the SIMD registers also duplicated?

[Alberto_Sykes]

Hi cake, Thank you very much for proving that information.

We will do further research on this matter in order to provide the most accurate response to your questions, as soon as I get any updates I will post all the details on this thread.

Regards,

Albert R.

Intel Customer Support Technician

[Alberto_R_Intel]

Hello cake, I just received an update on this matter.

The Intel® Core™ i9-10900K Processor has a total of 16 SIMD registers and each hyperthreading (HT) core will see its own 16 SIMD registers.

As for the example provided the answer is no, they are not sharing, each hyperthreading core will see its own 16 SIMD registers. In general, all the Instruction Set Architecture (ISA) defined registers need to be duplicated per-HT context so each HT can behave as a logic processor with no interference with the other HT cores.

Regards,

Albert R.

Intel Customer Support Technician

[Alberto_R_Intel]

Hello cake, I just wanted to check if the information posted previously was useful for you and if you need further assistance on this matter?

Regards,

Albert R.

Intel Customer Support Technician

[Alberto_R_Intel]

Hello cake, Since I have not heard back from you, we are closing the case, but if you have any additional questions, please post them on a new thread so we can further assist you with this matter.

Regards,

Albert R.

Intel Customer Support Technician