I'd like to know if there's any documentation to explain how to adjust/tuning the DDR timing of Baytrail E38xx? I mean to adjust Tsu and Th of DQ/DQS vs. CLK. I currently use Baytrail_FSP_Goldx package for Bios/Uboot but there's no document or explain how to access the register block to adjust the DDR timing. Appreciated if you can point me a direction.
The best support for this feature is provided by https://software.intel.com/en-us/forum Forums , please try posting your inquiry here. This forum is open for the developer community to support architect/developer questions regarding this platform.