good afternoon, i dont if this is the best question to ask here , but i have some problems because im given a project about basic processor, so the problem is with how to write VHDL testbench code for the 8 bits of 4:1 mux

[Leonardo_C_Intel]

Hello JMoku Thank you for posting in the Intel Community. The 4:1 Multiplexer Dataflow Model in VHDL with Testbench is software development to control a hardware device (prototype, etc), for better assistance with this inquire the best thing is referring it to Intel Resource & Design Center (https://www.intel.com/content/www/us/en/my-intel/design-center-sign-in.html?redirect=/content/www/us/en/design/resource-design-center.html) or Intel® developer zone (https://software.intel.com/en-us/home). Hope this helps. Regards, Leonardo C. Intel Customer Support Technician Under Contract to Intel Corporation