how to use intel cmt cat on core x cpu

[Jiangv]

NOTE: Mixed use of MSR and kernel interfaces to manage

    CAT or CMT & MBM may lead to unexpected behavior.

INFO: CACHE: type 1, level 1, max id sharing this cache 2 (1 bits)

INFO: CACHE: type 2, level 1, max id sharing this cache 2 (1 bits)

INFO: CACHE: type 3, level 2, max id sharing this cache 2 (1 bits)

INFO: CACHE: type 3, level 3, max id sharing this cache 64 (6 bits)

INFO: Monitoring capability detected

INFO: CPUID.0x7.0: L3 CAT supported

INFO: L3 CDP is disabled

INFO: L3CA capability detected

INFO: L3 CAT details: CDP support=1, CDP on=0, #COS=16, #ways=11, ways contention bit-mask 0x600

INFO: L3 CAT details: cache size 25952256 bytes, way size 2359296 bytes

INFO: CPUID 0x10.0: L2 CAT not supported!

INFO: L2CA capability not detected

INFO: MBA capability detected

INFO: MBA details: #COS=8, linear, max=90, step=10

L3CA/MBA COS definitions for Socket 0:

  L3CA COS0 => MASK 0x7ff

  L3CA COS1 => MASK 0x1

  L3CA COS2 => MASK 0x7ff

  L3CA COS3 => MASK 0x7ff

  L3CA COS4 => MASK 0x7ff

  L3CA COS5 => MASK 0x7ff

  L3CA COS6 => MASK 0x7ff

  L3CA COS7 => MASK 0x7ff

  L3CA COS8 => MASK 0x7ff

  L3CA COS9 => MASK 0x7ff

  L3CA COS10 => MASK 0x7ff

  L3CA COS11 => MASK 0x7ff

  L3CA COS12 => MASK 0x7ff

  L3CA COS13 => MASK 0x7ff

  L3CA COS14 => MASK 0x7ff

  L3CA COS15 => MASK 0x7ff

So I got those output from my server, I am not sure about the cache and ways and how it allocated, is I want COS1 has minimum cache to use, how should I config it? pls tell

[Maria_R_Intel]

Hello Jiangv,

Thank you for posting on the Intel* Community Forums.

Can you please confirm the following information?

• Provide the specific model of your processor.
• Are you using an Intel* server board? If so provide the model.

Best regards,

Maria R.

Intel Customer Support Technician

[Jiangv]

Hi Maria, Thanks

My cpu is a core i7 7980xe and running on x299 motherboard.

[Maria_R_Intel]

Hello Jiangv,

Thank you for the information.

We will look into this and posting back in this thread once an outcome is available.

Best regards,

Maria R.

Intel Customer Support Technician

[Maria_R_Intel]

Hello Jiangv,

Thank you for patiently waiting,

Please check the following sources:

• Administrator Guides for the Intel® Cache Acceleration Software and Open CAS Linux
• Introduction to Cache Allocation Technology in the Intel® Xeon® Processor E5 v4 Family
• Improving Real-Time Performance by Utilizing Cache Allocation Technology 

If you need further assistance, our recommendation is to refer the questions to the Intel Developer Forums. There you will find more accurate information and assistance.

Best regards,

Maria R.

Intel Customer Support Technician