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hello i am trying to finish my keypad encoder project. i ill be using Quartus II for simulation and the Altera DE2 board for testing. below is my vhdl code. i am stuck at defining my inputs and outputs in Quartus. Also i am stuck when it comes to assigning pins to the DE2 board. PLEASE HELP!!
LIBRARY ieee; USE ieee.std_logic_1164.all ; ENTITY keyencoder IS PORT ( clk :IN STD_LOGIC; col :IN STD_LOGIC_VECTOR (3 DOWNTO 0) ; row :OUT STD_LOGIC_VECTOR (3 DOWNTO 0) ; d :OUT STD_LOGIC_VECTOR (3 DOWNTO 0) ; dav :OUT STD_LOGIC ); END keyencoder; ARCHITECTURE vhdl OF keyencoder IS SIGNAL Freeze :STD_LOGIC; SIGNAL data :STD_LOGIC_VECTOR (3 DOWNTO 0); BEGIN PROCESS (clk) VARIABLE ring :STD_LOGIC_VECTOR (3DOWNTO 0) ; BEGIN IF (clk'EVENT AND clk = '1') THEN IF freeze = '0' THEN CASE ring IS WHEN "1110" => ring := "1101"; WHEN "1101" => ring := "1011"; WHEN "1011" => ring := "0111"; WHEN "0111" => ring := "1110"; WHEN OTHERS => ring := "1110"; END CASE; END IF; dav <= freeze; END IF; row <= ring; CASE ring IS WHEN "1110" => data(3 DOWNTO 2) <= "00"; WHEN "1101" => data(3 DOWNTO 2) <= "01"; WHEN "1011" => data(3 DOWNTO 2) <= "10"; WHEN "0111" => data(3 DOWNTO 2) <= "11"; WHEN OTHERS => data(3 DOWNTO 2) <= "00"; END CASE; CASE col IS WHEN "1110" => data(1 DOWNTO 0) <= "00"; freeze <= '1'; WHEN "1101" => data(1 DOWNTO 0) <= "01"; freeze <= '1'; WHEN "1011" => data(1 DOWNTO 0) <= "10"; freeze <= '1'; WHEN "0111" => data(1 DOWNTO 0) <= "11"; freeze <= '1'; WHEN OTHERS => data(1 DOWNTO 0) <= "00"; freeze <= '0'; END CASE; IF freeze = '1' THEN d <= data; ELSE d <= "ZZZZ" ; END IF; END PROCESS; END vhdl;
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First of all, can you repost your code with carriage returns please, we cant really read your code.
I suggest using modelsim instead of the quartus simulator. you can then use a VHDL testbench and it allows you to control the inputs better. And for pins - you just need to go to the assignment editor in quarts - and assign each pin from your top level to a pin on the board.- Mark as New
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