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Hi all,
I am designing a Nios ll classic based SOC for DE2-115 , when i studied its .v file i noticed that vga controller out ports i.e output wire [7:0] vga_controller_ext_R, // .R output wire [7:0] vga_controller_ext_G, // .G output wire [7:0] vga_controller_ext_B // .B ); are all 8-bit ???? this is wrong it should be 10-bit . i used the Altera UP IPs for creating all components in Quartus prime ver 16.0 . And i dont see any option to change the width of vga controller ??? Any one any idea whats wrong here ??? RegardsLink Copied
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