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I used power analyzer tool to estimate the power consumption of my design (a vcd file). I find the current flow into VCCINT is nearly 7mA, Since I inserted a resistor in the power supply rail of the VCCINT, and I measured the current flow through the resistor is nearly 12mA. Can someone tell me why there is a big difference between these two values? Thank you very much.
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It could be because the estimates you gave the power analyser tool (especially toggle rates) where a bit optimistic.
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Thank you for your reply! Except the toggle rate, what else will cause this difference? If there are some references where I can have a look will be better. I have another question. If I changed my microcontroller, like reducing the number of registers, in the theory, Should there be some change in these current values? But I find these values nothing change. When I reduce some registers or reduce some instructions, or even reduce a hardware multiplier. I am not should if I did the wrong thing. Thank you for helping!
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you should change Assignments > Settings > Operating Conditions from Typical to Maximum
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Thank you for your reply! What about the second question? If I changed my microcontroller, like reducing the number of registers, in the theory, Should there be some change in these current values? Or since it consider the worest situation, there is no difference? Thank you!
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yes, resource utilization will affect power consumption
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Thank you for your reply! But when I use power analyzer tool to estmate the different VCD file, the current drawn throw the VCCINT isnot change, Do you know why? Thank you!
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Does the actual number of registers change after compilation and optimization? You can see it in the fitter report. How important is the change?
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And how much of the vccint current is static/dynamic?
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Yes, there are significant register change in the fitter report. static is 1.46mA, while dynamic is 1.93mA. Thank you!
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Are all your clocks properly defined? I think you should see them somewhere in the Timequest report, there is a list of clock with their frequencies.
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Thank you for your replr. I find there are some unconstrains path,like altera_reserved_tdo,tdi,tms these staffs, how to solve these? And will these influence the power analyzer result? Thank you.
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no, those are the jtag interface and it isn't important.
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I have used power analyzer toll to estimate the power. But there are some values seems strange. One is when I reduced RETI instructions (only 3.48), it significant reduced much current ( the biggest reduced in those instructions), while in the resource usage report, it didnot reduced so much resouce, like logic elements or registers. Why it will reduce so much current? What possible cause this result? Another value is when I reduced all the instructions (3.72) which didnot been used in my test program, it didnot reduce the more current consumption than when I just reduced one of those instructions (like 3.53, 3.48 ) or some part which related to ALU (3.5), how could this happen? ALL the value on the garph are the value get by the power analyzer tool when reduced part of the microcontroller, like unused instructions, unused registers, unused hardware multipliers. The first "all" in the graph means nothing reduced, others are all values after reduced. Thank you very much.

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